Minimum qualifications:Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.10 years of experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.Preferred qualifications:Master’s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.Experience working cross functionally with chip top design, physical design, static timing analysis (STA), package, system, validation teams.Experience in high speed serdes IP evaluation, post silicon validation, and debugging.Experience with 2.5D/3D package design such as silicon interposer, silicon bridge, 3D die stacking.Knowledge of channel design and sign off as well as serdes system modeling (e.g., BER, SNR, etc.) for speeds beyond 112Gbps.
Minimum qualifications:
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