Design Verification Engineer, Silicon

Minimum qualifications:Bachelor’s in Electrical Engineering, Computer Engineering, or a related field or equivalent practical experience.3 years of experience in silicon design verification, with a focus on SoCs or ASICs.Preferred qualifications:6 years of experience in silicon design verification, with a focus on SoCs or ASICs.Experience with scripting languages (Python, Perl) for automation.Knowledge of SystemVerilog and Verification Methodologies (UVM).Understanding of digital design fundamentals and Register-Transfer Level (RTL) coding.Familiarity with formal verification and assertion-based verificationtechniques.

Minimum qualifications:

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